Semiconductor Assembly Process Technology Development Senior Engineer

You will be responsible for technology development tasks in the assembly and packaging of advanced semiconductor packages for AI, HPC (High Performance Computing), automotive, and IoT advanced semiconductor packages (such as Flip Chip Ball Grid Array and Power Semiconductor Packages). - Development, equipment selection, and implementation of assembly technologies for advanced packages such as VPS, FCCSP, and FCBGA - Development and improvement of materials and processes for assembly processes (SMT, SPI, AOI, Flip Chip bonding, Flux cleaning)  - Support for Launching and Transitioning to Mass Production Lines - Process quality and yield improvement activities  Ou company is driving innovation in semiconductor packaging technologies including Flip Chip, SiP, VPS, FCCSP, and FCBGA. As demand continues to grow in AI, HPC, automotive, and IoT applications, advanced packages with higher density, improved thermal performance, and greater reliability are becoming increasingly important.  To support the rapid expansion of these technologies, we are seeking experienced engineers in semiconductor assembly and packaging processes. In this role, you will contribute to the development of next-generation packages for AI/HPC, ADAS, and other advanced applications, from package design and process development to product launch. This is an excellent opportunity to work on cutting-edge semiconductor technologies and play a key role in shaping future innovations.     Required Qualifications: - Over 5 years of experience in technology development in semiconductor back-end processes (assembly and packaging) - Over 5 years of technical development experience in any of the following processes: SMT, SPI, AOI, Flip Chip bonding, or Flux cleaning - Practical experience in process improvement, quality control, and equipment introduction - Technical Degrees (mechanical, materials, electronics, chemistry, etc.) - Business-level proficiency in both Japanese and English  Preferred Qualifications: - Practical experience in analyzing and improving defects using FTA, 5Whys, etc. in subsequent processes - Experience in materials development such as material selection and optimization - Experience in CAD design, including jigs and tool design and optimization - Knowledge of semiconductor technology standards such as IATF and JEDEC - Practical experience as PM in product development  ルネサスは、「To Make Our Lives Easier（人々の暮らしをより豊かで快適にする）」というPurposeのもと、組込み半導体ソリューションを提供するグローバル企業です。世界30か国以上で活躍する21,000人を超えるエンジニアや課題解決のプロフェッショナルとともに、自動車、産業、インフラ、IoT分野における世界最先端のテクノロジー開発に携わり、より安全で、健康的で、環境にやさしく、スマートな未来の実現に貢献しています。    ルネサスでは、「TAGIE（Transparent、Agile、Global、Innovative、Entrepreneurial）」を企業文化の中核としています。TAGIEは、私たちの働き方や成長のあり方、そしてPurposeの実現に向けた取り組みを支える共通の価値観です。この協調的な精神と挑戦するマインドセットが、半導体技術を通じた産業の変革と、世界中の人々の暮らしへの貢献を可能にしています。    私たちは、競争力のある報酬制度に加え、充実した福利厚生をご用意しています。福利厚生の詳細については、選考プロセスの中でご案内いたします。    私たちとともに未来を創造する挑戦に、ぜひ参加しませんか。皆さまからのご応募をお待ちしております。